Solid-state imaging device, fabrication method for the same, and electronic apparatus

ABSTRACT

A solid-state imaging device includes a photodetector which is formed on a substrate and is configured to generate signal charge by photoelectric conversion, a floating diffusion configured to receive the signal charge generated by the photodetector, a plurality of MOS transistors including a transfer transistor that transfers the signal charge to the floating diffusion and an amplification transistor that outputs an pixel signal corresponding to a potential of the floating diffusion, a multi-wiring layer which is formed in a layer higher than the substrate and is composed of a plurality of wiring layers electrically connected to the MOS transistors via contact portions, and a light-shielding film that is constituted by a bottom wiring layer disposed in a layer higher than the substrate and lower than the multi-wiring layer.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to solid-state imaging devices. Inparticular, the present invention relates to CMOS solid-state imagingdevices which transfer signal charge to floating diffusions, and methodsfor fabricating the solid-state imaging devices. The present inventionalso relates to electronic apparatuses employing the solid-state imagingdevices.

2. Description of the Related Art

Solid-state imaging devices are generally classified into CCD (chargecoupled devices) solid-state imaging devices and CMOS (complementarymetal oxide semiconductor) solid-state imaging devices. In a CCDsolid-state imaging device, a high drive voltage is necessary totransfer signal charge, and a high supply voltage is necessary comparedto a CMOS solid-state imaging device. Thus, CMOS solid-state imagingdevices are more advantageous than CCD solid-state imaging devices inview of power consumption.

Thus, CMOS solid-state imaging devices, which are more advantageous thanCMOS solid-state imaging devices, have been in wide use as solid-stateimaging devices for mobile apparatuses such as mobile phones equippedwith cameras and PDAs (personal digital assistants).

A CMOS solid-state imaging device includes a photodiode and is composedof a photodetector for generating signal charge upon receiving light, afloating diffusion receiving the signal charge generated by thephotodetector, and a plurality of MOS transistors. The MOS transistorsinclude a transfer transistor, a reset transistor, an amplificationtransistor, and, as necessary, a selection transistor. These MOStransistors are connected predetermined wiring layers in a multi-wiringlayer. In the CMOS solid-state imaging device, signal charge generatedand accumulated in the photodetector is transferred by the transfertransistor to the floating diffusion on a pixel by pixel basis. Thesignal charge read by the floating diffusion is amplified by theamplification transistor and selectively output to a one of verticalsignal lines formed in the multi-wiring layer.

Meanwhile, in such a CMOS solid-state imaging device, a larger apertureabove a photodiode serving as a photodetector is more desirable toefficiently collect light incident onto the photodiode.

On the other hand, photoelectric conversion also occurs in the floatingdiffusion if it receives light while reading signal charge transferredfrom the photodetector, which results in noise. Therefore, it isdesirable that the floating diffusion is shielded from light.

In a CMOS solid-state imaging device according to the related art, afloating diffusion is shielded from light using a multi-wiring layerdisposed above the substrate. However, since pixels are formed usingCMOS processes as in the case of the other peripheral circuits, thewiring layers may not be disposed so as to be immediately above thefloating diffusion, as compared to the case of a CCD solid-state imagingdevice. Thus, it is not possible to decrease the distance between thewiring layers constituting a light-shielding film and a floatingdiffusion and to prevent light leakage into the floating diffusion.

In view of the above problem, Japanese Unexamined Patent ApplicationPublication No. 2004-140152 discloses a CMOS solid-state imaging devicein which a light-shield is formed using a multilayer gate electrodefilm. In this technique, since the light-shield is arranged immediatelyabove the floating diffusion, leakage of light into the floatingdiffusion may be suppressed. However, to form the gate electrode film ina multilayer structure, the gate electrode film is made of silicide,which leads to complicated fabrication processes. In addition, it isdifficult to form a small aperture for a contact region due tounevenness of the gate electrode. Thus, it is necessary for a floatingdiffusion to have a large area in order to form the contact region.Moreover, interference between the gate electrode layers due to a largeparasitic capacitance between the gate electrode layers is also a matterof concern.

Japanese Unexamined Patent Application Publication No. 2004-71931discloses a technique in which gate electrodes of a floating diffusionand an amplification transistor are electrically connected withoutwiring. This increases the degree of freedom in layout of wiring layersand thus makes it possible to increase the size of the aperture of thephotodetector. However, according to Japanese Unexamined PatentApplication Publication No. 2004-71931, a floating diffusion is shieldedfrom light using a wire arranged in a multi-wiring layer disposed in anupper layer. This allows light to travel between the light-shieldingfilm and the floating diffusion, resulting in insufficient lightshielding performance.

SUMMARY OF THE INVENTION

The present invention has been made in view of the above circumstances.Accordingly, there is a need for a solid-state imaging device whichefficiently shields a floating diffusion from light and thus providesimages with improved quality. There is also a need for an electronicapparatus using the solid-state imaging device.

It is desirable that a solid-state imaging device according to anembodiment of the present invention includes a photodetector, a floatingdiffusion, a plurality of MOS transistors, a multi-wiring layer, and alight-shielding film.

The photodetector is formed on a substrate and generates signal chargeby converting incident light into electricity. The floating diffusion isconfigured to receive the signal charge generated by the photodetector.The MOS transistors include a transfer transistor that transfers thesignal charge to the floating diffusion and an amplification transistorthat outputs a pixel signal corresponding to a potential of the floatingdiffusion. The multi-wiring layer is formed in a layer higher than thesubstrate and is composed of a plurality of wiring layers electricallyconnected to the MOS transistors via contact portions. Thelight-shielding film is constituted by a bottom wiring layer disposed ina layer higher than the substrate and lower than the multi-wiring layer.The light shielding film is formed at a region that shields at least thefloating diffusion from the light and is electrically connected to thefloating diffusion via a contact portion.

In a solid-state imaging device according to an embodiment of thepresent invention, the floating diffusion is shielded from light by thelight-shielding film constituted by the bottom wiring layer. The bottomwiring layer is disposed at a position lower than the multi-wiring layerand close to the upper surface of the substrate. Thus, thelight-shielding film constituted by the bottom wiring layer can preventleakage of light into the floating diffusion.

In a method for fabricating a solid-state imaging device according to anembodiment of the present invention, a photodetector and a floatingdiffusion are first formed on a substrate. Then, a first insulatinglayer is formed on the substrate. Then, an aperture is formed in thefirst insulating layer so that the floating diffusion is exposed.Subsequently, a contact portion is formed by filling the aperture with ametallic material. Then, a light-shielding film constituted by a bottomwiring layer is formed on the first insulating layer including thecontact portion, at a region that shields the floating diffusion fromlight. Further, a second insulating layer is formed on the firstinsulating layer including the light-shielding film. Then, amulti-wiring layer having a plurality of wiring layers is formed on thesecond insulating layer.

In a method for fabricating a solid-state imaging device according to anembodiment of the present invention, a photodetector, a floatingdiffusion, and an impurity region constituting a predetermined source ordrain of a MOS transistor are first formed are formed on a substrate.Then, apertures for exposing the floating diffusion and the impurityregion are formed by removing respective portions of the firstinsulating layer above the floating diffusion and the impurity region.Then, contact portions are formed by filling the apertures formed in thefirst insulating layer with a metallic material. Subsequently, alight-shielding layer constituted by a bottom wiring layer is formed onthe first insulating layer including the contact portion formed on thefloating diffusion, at a region shielding the floating diffusion fromthe light. Further an intermediate film constituted by the bottom wiringlayer is formed on the first insulating layer including the contactportion formed on the impurity region. Then, a second insulating layeris formed on the first insulating layer including the light-shieldingfilm and the intermediate film. Subsequently, an aperture is formed inthe second insulating layer so that the intermediate film is exposed.Then, a contact portion is formed by filling the aperture formed in thesecond insulating layer with a metallic material. Further, amulti-wiring layer having a plurality of wiring layers including a wireconnected to the contact portion formed in the second insulating layeris formed.

An electronic apparatus according to an embodiment of the presentinvention includes an optical lens, the solid-state imaging devicedescribed above, and a signal processing circuit.

According to an embodiment of the present invention, there is providedfor a solid-state imaging device which suppresses degradation of imagequality caused by noise and for an electronic apparatus using thesolid-state imaging device.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 schematically illustrates an entire structure of a solid-stateimaging device according to a first embodiment of the present invention;

FIG. 2 is a plan view illustrating a single pixel in a solid-stateimaging device according to the first embodiment of the presentinvention;

FIG. 3 is a cross sectional view taken along line III-III′;

FIG. 4 illustrates a circuit configuration of a single pixel in asolid-state imaging device according to the first embodiment of thepresent invention;

FIG. 5 is a cross-sectional view illustrating an example of electricalconnection between a light-shielding film and a gate electrode;

FIG. 6 is a cross-sectional view illustrating another example ofelectrical connection between a light-shielding film and a gateelectrode;

FIGS. 7 A to 7C illustrate processes of fabricating a solid-stateimaging device according to the first embodiment of the presentinvention;

FIGS. 8D and 8E illustrate processes of fabricating a solid-stateimaging device according to the first embodiment of the presentinvention;

FIGS. 9F to 9H illustrate processes of fabricating a solid-state imagingdevice according to the first embodiment of the present invention;

FIG. 10 is a plan view illustrating a single pixel according to a secondembodiment of the present invention;

FIG. 11 is a cross-sectional view taken along line XI-XI′ in FIG. 10;

FIG. 12 is a schematic cross-sectional view illustrating a solid-stateimaging device according to a third embodiment of the present invention;

FIGS. 13A to 13C illustrate processes of fabricating a solid-stateimaging device according to the third embodiment of the presentinvention;

FIGS. 14D and 14E illustrate processes of fabricating a solid-stateimaging device according to the third embodiment of the presentinvention;

FIGS. 15A and 15B are schematic cross-sectional views each illustratinga configuration a solid-state imaging device according to a fourthembodiment of the present invention; and

FIG. 16 schematically illustrates a configuration of an electronicapparatus according to a fifth embodiment of the present invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

In the following, examples of a solid-state imaging device, a method forfabricating the solid-state imaging device, and an electronic apparatusaccording to embodiments of the present invention will be described withreference to FIG. 1 to FIG. 16. The preferred embodiments of the presentinvention will be described in the following sequence. Note that thepresent invention is not limited to the examples described below.

1. First Embodiment: Solid-state imaging device

1.1 Overall configuration of solid-state imaging device

1.2 Configurations of main components

1.3 Fabrication method of solid-state imaging device

2. Second Embodiment: Solid-state imaging device3. Third Embodiment: Solid-state imaging device

3.1 Configurations of main components

3.2 Fabrication method of solid-state imaging device

4. Fourth Embodiment: Solid-state imaging device5. Fifth Embodiment: Electronic apparatus

1. First Embodiment Solid-State Imaging Device [1.1 OverallConfiguration of Solid-State Imaging Device]

FIG. 1 is a block diagram schematically illustrating an overallconfiguration of a solid-state imaging device according to the firstembodiment of the present invention.

A solid-state imaging device 1 according to the present embodimentincludes a pixel section 3 composed of a plurality of pixels 2 arrangedon a substrate 11 formed of silicon, a vertical drive circuit 4, columnsignal processing circuits 5, a horizontal drive circuit 6, an outputcircuit 7, and a control circuit 8.

The pixels 2 are each composed of a photodetector composed of aphotodiode and a plurality of MOS (metal oxide semiconductor)transistors and are arranged in a regular two-dimensional array on thesubstrate 11. The MOS transistors constituting the pixels 2 may becomposed of four MOS transistors including a transfer transistor, areset transistor, a selection transistor, and an amplificationtransistor. The MOS transistors may also be constituted by the tree ofthe four MOS transistors (excluding the selection transistor).

The pixel section 3 is composed of the pixels 2 arranged in a regulartwo-dimensional array. The pixel section 3 includes an effective pixelregion and a black reference pixel region (not shown). The effectivepixel region serves to receive light, amplify signal charge generated byphotoelectric conversion, and transfer the signal charge to the columnsignal processing circuit 5. The black reference pixel region serves tooutput optical black level as a reference black level. In general, sucha black reference pixel region is provided around a circumferentialperiphery of the effective pixel region.

The control circuit 8 generates signals, such as clock signals andcontrol signals, for controlling operations of the vertical drivecircuit 4, the column signal processing circuits 5, and the horizontaldrive circuit 6, on the basis of vertical synchronization signals,horizontal synchronization signals, and master clock signals. Thesignals generated by the control circuit 8 are input to the verticaldrive circuit 4, the column signal processing circuit 5, the horizontaldrive circuit 6, and so forth.

The vertical drive circuit 4 is composed of a shift register, forexample, and selectively scans the pixels 2 in the pixel section 3 inthe vertical direction sequentially in units of rows. Then, the verticaldrive circuit 4 supplies pixel signals to the column signal processingcircuits 5 through vertical signal lines. The pixel signals aregenerated on the basis of signal charge generated in the individualphotodiodes of the pixels 2 in accordance with the quantity of receivedlight.

The column signal processing circuits 5 are provided for the individualcolumn of the pixels 2. Each of the column signal processing circuits 5performs signal processing, such as noise reduction and signalamplification, on signals output from the pixels 2 corresponding to asingle row in units of columns, using signals from the black referencepixel region (provided around a circumference periphery of the effectivepixel region (not shown)). A horizontal selection switch (not shown) isprovided between the output stage of the column signal processingcircuits 5 and a horizontal signal line 10.

The horizontal drive circuit 6 is composed of a shift register, forexample. The horizontal drive circuit 6 sequentially selects the columnsignal processing circuits 5 to cause the individual column signalprocessing circuits 5 to output pixel signals to the horizontal signalline 10.

The output circuit 7 performs signal processing on signals sequentiallysupplied from the individual column signal processing circuits 5 throughthe horizontal signal line 10 and outputs the processed signals.

[1.2 Configurations of Main Components]

In the following, schematic configurations of main components of asolid-state imaging device according to the present embodiment will bedescribed with reference to FIG. 2 to FIG. 4. FIG. 2 is a plan viewillustrating a single pixel in the solid-state imaging device 1according to the present embodiment. FIG. 3 is a cross-sectional viewtaken along line III-III′ in FIG. 2. FIG. 4 illustrates a circuitconfiguration corresponding to a single pixel in the solid-state imagingdevice 1 according to the present embodiment.

Referring to FIG. 2, each of the pixels 2 according to the presentembodiment has a photodetector 14, a floating diffusion 15, and aplurality of MOS transistors. In the present embodiment, the MOStransistors include a transfer transistor Tr1, a reset transistor Tr2,an amplification transistor Tr3, and a selection transistor Tr4. In thepresent embodiment, a light-shielding film 24 for covering the floatingdiffusion 15 is provided above the floating diffusion 15.

As illustrated in FIG. 3, the photodetector 14 is formed of a photodiodedisposed at a predetermined position on the upper surface of a substrate13 made of silicon. The photodetector 14 generates signal chargecorresponding to the quantity of incident light and accumulates thesignal charge.

The floating diffusion 15 is disposed on the upper surface of thesubstrate 13 at a position adjacent the photodetector 14. The regionbetween the photodetector 14 and the floating diffusion 15 serves as achannel region of the transfer transistor Tr1.

The photodetector 14 also includes impurity regions 17, 18, and 19forming source/drain regions of the MOS transistors, which will bedescribed below, at predetermined positions on the upper surface of thesubstrate 13 serving as a light incident surface. Gate electrodes 20,21, 22, and 23 are also disposed on the substrate 13 via a gateinsulating film 16.

The transfer transistor Tr1 includes a source constituted by thephotodetector 14, a drain constituted by the floating diffusion 15, andthe gate electrode 20 formed between the source and the drain. Asillustrated in FIG. 4, a transfer pulse φ TRG is supplied to the gateelectrode 20 of the transfer transistor Tr1. As a result, signal chargeaccumulated in the photodiode 14 is transferred to the floatingdiffusion 15.

The reset transistor Tr2 has a source constituted by the floatingdiffusion 15, a drain constituted by the impurity region 17 to which asupply voltage VDD is supplied, and the gate electrode 21 formed betweenthe source and the drain. As illustrated in FIG. 4, a reset pulse φ RSTis supplied to the gate electrode 21 of the reset transistor Tr2. Thiscauses the potential of the floating diffusion 15 to be reset to apotential that approximates the supply voltage VDD.

The amplification transistor Tr3 includes a source constituted by theimpurity region 17 to which the supply voltage VDD is supplied, a drainconstituted by the impurity region 18 and the gate electrode 22 formedbetween the source and the drain. As illustrated in FIG. 4, thepotential of the floating diffusion 15 is supplied to the gate electrode22 of the amplification transistor Tr3. This causes a pixel signalcorresponding to the potential to be output to the impurity region 18serving as the drain.

The selection transistor Tr4 includes a source constituted by theimpurity region 18, a drain constituted by the impurity region 19connected to a vertical signal line VSL, and the gate electrode 23formed between the source and the drain. The impurity region 18 servingas the source of the selection transistor Tr4 is also used as the drainof the amplification transistor Tr3. As illustrated in FIG. 4, aselection pulse φ SEL is supplied to the gate electrode 23 of theselection transistor Tr4. As a result, a pixel signal is output to thevertical signal line VSL.

As illustrated in FIG. 3, a first insulating layer 27 is formed on thegate insulating film 16 including the gate electrodes 21 to 23. Alight-shielding film 24 constituted by a bottom wiring layer M0 isdisposed on the first insulating layer 27 at a region above the floatingdiffusion 15. This light-shielding film 24 (bottom wiring layer M0) ismade of a metal and is electrically connected to the floating diffusion15 by a contact portion 25 formed in the floating diffusion 15. In thepresent embodiment, a metal used for forming the contact portion 25 andthe light-shielding film 24 may be tungsten, for example. For the bottomwiring layer M0, a metal such as tungsten, aluminum, and copper may beused. In particular, the use of tungsten for the bottom wiring layer M0,which is the same material as that generally used for contact portions,increases reliability in manufacturing processes.

Further, a second insulating layer 28 is formed on the first insulatinglayer 27 including the light-shielding film 24. A multi-wiring layer 29is formed on the second insulating layer 28. In the multi-wiring layer29, a plurality of wiring layers are formed with an interlayerinsulating film therebetween. In the present embodiment, three wiringlayers M1, M2, and M3 are provided. The wiring layer M1, which islocated at the lowest position among the three wiring layers M1 to M3,constitutes a vertical signal line VSL. This vertical signal line VSL iselectrically connected to the impurity region 19 constituting theselection transistor Tr4 via a contact portion 26 formed through thesecond insulating layer 28, the first insulating layer 27, and the gateinsulating film 16. The individual wiring layers M1, M2, and M3 in themulti-wiring layer 29 are connected to the gate electrodes 20, 21, 22,and 23, and the like via contact portions (not shown), so as to be usedas wires for supplying pulse signals as necessary. The wiring layers M1,M2, and M3 are preferably formed of a low-resistance metal such asaluminum and copper. The contact portion 26 may be formed of tungsten.

As described above, in the solid-state imaging device 1 according to thepresent embodiment, the light-shielding film 24 shielding the floatingdiffusion 15 from light is made of a metal formed in a layer higher thanthe substrate 13 and lower than the multi-wiring layer 29.

Meanwhile, it is necessary that the floating diffusion 15 and the gateelectrode 22 be electrically connected to each other.

FIG. 5 is a cross-sectional view illustrating an example of anelectrical connection between the light-shielding film 24 and the gateelectrode 22.

In this example, the floating diffusion 15 is connected to the gateelectrode 22 of the amplification transistor Tr3 using the wiring layerM1, which is disposed at the lowest position among the wiring layers M1,M2, and M3 in the multi-wiring layer 29. In this case, as shown in FIG.5, the light-shielding film 24 is electrically connected to the wiringlayer M1 via a contact portion 32, and the gate electrode 22 iselectrically connected to the wiring layer M1 via a contact portion 33,so that the floating diffusion 15 and the gate electrode 22 areelectrically connected to each other.

Another example of an electrical connection between the light-shieldingfilm 24 and the gate electrode 22 is illustrated in FIG. 6.

In this example, the light-shielding film 24 is used as a wire forconnecting the floating diffusion 15 and the gate electrode 22. In thiscase, as shown in FIG. 6, the light-shielding film 24 extends above thegate electrode 22 of the amplification transistor Tr3 and is connectedto the gate electrode 22 via a contact portion 36. With thisarrangement, the floating diffusion 15 and the gate electrode 22 areelectrically connected to each other. In the present embodiment, thelight-shielding film 24 is formed of a metal, so as to also be used as awire connecting the floating diffusion 15 and the gate electrode 22.This can decrease the size of a region occupied by the wiring layer M1,compared to the case illustrated in FIG. 5, and thus can increase thesize of the aperture of the photodetector 14.

In the solid-state imaging device 1 having the above configuration,signal charge accumulated in the photodetector 14 is transferred by thetransfer transistor Tr1 to the floating diffusion 15. The signal chargeread by the floating diffusion 15 is amplified by the amplificationtransistor Tr3 and selectively transferred by the selection transistorTr4 to a vertical signal line VSL. The signal charge read by thefloating diffusion 15 is reset by the reset transistor Tr2 to apotential that approximates the supply voltage VDD.

[1.3 Fabrication Method of Solid-State Imaging Device]

In the following, a method for fabricating the solid-state imagingdevice according to the present embodiment will be described withreference to FIG. 7A to FIG. 9H. FIG. 7A to FIG. 9C illustrate processesin the fabrication method of the solid-state imaging device 1 accordingto the present embodiment.

Firstly, the upper surface, or light-incident surface, of the siliconsubstrate 13 is doped with a predetermined conductive impurity by ionimplantation. As a result, as illustrated in FIG. 7A, the gateinsulating film 16 is formed on the substrate 13, and gate electrodes20, 21, 22, and 23 are formed at predetermined positions on the gateinsulating film 16. These gate electrodes 20, 21, 22, and 23 are formedby patterning a polysilicon film deposited on the gate insulating film16.

Then, as illustrated in FIG. 7B, using the gate electrodes 20 to 23 asmasks, the photodetector 14, the floating diffusion 15, and impurityregions 17, 18, and 19 serving as the sources and drains of theindividual MOS transistors are formed.

Then, as illustrated in FIG. 7C, the first insulating layer 27 is formedon the upper surface of gate insulating film 16 including the gateelectrodes 20 to 23.

Subsequently, as illustrated in FIG. 8D, an aperture 25 a is formedthrough the gate insulating film 16 and the first insulating layer 27 sothat the floating diffusion 15 is exposed.

Then, as illustrated in FIG. 8E, the aperture 25 a is filled withtungsten so as to form the contact portion 25. Then, the bottom wiringlayer M0 made of tungsten is disposed on the first insulating layer 27so as to be located above the floating diffusion 15. This bottom wiringlayer M0 constitutes the light-shielding film 24. A metal film formed oftungsten is formed over the entire upper surface of the first insulatinglayer 27, and then the light-shielding film 24 is formed by patterningthe tungsten metal film. It is desirable that the region occupied by thelight-shielding film 24 on the first insulating layer 27 is larger thanthe upper surface of the floating diffusion 15. This arrangementimproves the light shielding effect for light incident from variousangles.

Subsequently, as illustrated in FIG. 9F, the second insulating layer 28is formed on the first insulating layer 27 including the light-shieldingfilm 24.

Then, as illustrated in FIG. 9G, an opening 26 a for providing thecontact portion 26 is formed at a predetermined position of the secondinsulating layer 28. In the present embodiment, the opening 26 apenetrates the second insulating layer 28, the first insulating layer27, and the gate insulating film 16, such that the impurity region 19serving as the drain of the selection transistor Tr4 is exposed.

Then, as illustrated in FIG. 9H, the opening 26 a is filled withtungsten so as to form the contact region 26.

Although not illustrated in the drawings, the wiring layer M1 formed ofaluminum or copper is disposed at a region including the contact portion26 on the second insulating layer 28. This process is followed byprocesses of forming the wiring layers M2 and M3 with the interlayerinsulating film 30 therebetween so as to form the multi-wiring layer 29having the three wiring layers M1, M2, and M3. It is desirable that thewiring layers M1 to M3 have low resistance and be made of aluminum orcopper.

Subsequently, using a general fabrication method of solid-state imagingdevices, a planarizing layer, a color filter layer, an on-chipmicrolens, and so forth are formed, and thus the fabrication of thesolid-state imaging device 1 is completed.

In the fabrication method described above, when the floating diffusion15 is desired to be connected to the gate electrode 22 of theamplification transistor Tr3 using the wiring layer M1 as in the caseillustrated in FIG. 5, the contact portions 32 and 33 are formed in theprocesses illustrated in FIGS. 9G and 9H. Then, by connecting thecontact portions 32 to the contact portion 33 by the wiring layer M1,the floating diffusion 15 is electrically connected to the gateelectrode 22 of the amplification transistor Tr3.

In the fabrication method described above, when the floating diffusion15 is desired to be connected to the gate electrode 22 of theamplification transistor Tr3 using the light-shielding film 24 as in thecase illustrated in FIG. 6, an aperture is formed above the gateelectrode 22 in the process illustrated in FIG. 8D. Then, the apertureprovided above the gate electrode 22 is filled with tungsten so that thecontact portion 36 is formed. In this case, the light-shielding film 24is formed so as to extend above the contact region 36 in the processillustrated in FIG. 8E. Thus, the floating diffusion 15 and the gateelectrode 22 of the amplification transistor Tr3 are electricallyconnected to each other.

In the present embodiment, the processes of forming the photodetector14, floating diffusion 15, and the impurity regions 17 to 19 areperformed after the gate electrodes 20 to 23 are formed. However, thesequence of the processes may be modified in various ways, and thephotodetector 14, floating diffusion 15, and the impurity regions 17 to19 may be formed before the formation of the gate electrodes 20 to 23.Further, in the embodiment described above, the vertical signal line VSLformed in the multi-wiring layer 29 is connected to the impurity region19 of the selection transistor Tr4 by the contact portion 26. The otherwires in the wiring layers, i.e., M1, M2, and M3, may be connected todesired region through contact portions formed by processes similar tothose described above.

The solid-state imaging device 1 is fabricated through the aboveprocesses.

According to the solid-state imaging device 1 of the present embodiment,the light-shielding film 24 for shielding the floating diffusion 15 fromlight is formed in a layer lower than the multi-wiring layer 29. As aresult, the distance between the upper surface of the substrate 13 andthe light-shielding film 24 is decreased. This makes it possible tosuppress leakage of light from an interlayer film such as the insulatinglayer formed between the floating diffusion and the light-shielding film42 into the floating diffusion 15. Consequently, noise due lightincident onto the floating diffusion 15 during transfer of signal chargefrom the photodetector 14 to the floating diffusion 15 can besuppressed, which improves image quality.

Further, according to the solid-state imaging device 1 of the presentembodiment, parasitic capacitance occurs between the floating diffusion15 and the light-shielding film 24. This indicates that the use oflight-shielding film 24 can increase saturation charge in the floatingdiffusion 15.

Moreover, according to the related art, when a wiring layer of themulti-wiring layer 29 (e.g., the wiring layer M1) is used for forming alight-shielding film, both a wiring region used for light-shielding anda wiring region for other wiring are both necessary. That is, accordingto the related art, it is necessary to provide a number of wiringregions in the same layer. However, according to the solid-state imagingdevice 1 in the present embodiment, the light-shielding film 24 isconstituted by the bottom wiring layer M0 provided in a layer lower thanthe multi-wiring layer 29. Thus, it is not necessary to fabricate a wireused for light-shielding in the wiring layers M1 to M3 of themulti-wiring layer 29. As a result, the size of the area occupied by thewiring layers M1 to M3 in the multi-wiring layer 29 is reduced,permitting an increase in size of the aperture of the photodiode 14.Accordingly, the quantity of light incident onto the photodiode 14 canbe increased in each of the pixels 2.

According to a recently developed technique, a CMOS solid-state imagingdevice having a global shutter function (simultaneous shutter function)may employ a drive system in which signal charge is stored in a floatingdiffusion for a long period of time. In such a CMOS solid-state imagingdevice, signal charge generated by simultaneous exposure of all pixelsis simultaneously transferred to the floating diffusion and thenline-sequentially output to the vertical signal lines VSL. In this case,the signal charge stored in the floating diffusion is not transferredimmediately to a vertical signal line, light leaked into the floatingdiffusion causes significant degradation of image quality. Even in acase where signal charge is stored in the floating diffusion for a shortperiod of time, incidence of high-luminance light on the floatingdiffusion results in degradation of image quality.

According to the solid-state imaging device 1 in the present embodiment,leakage of light into the floating diffusion 15 can be suppressed by theeffect of the light-shielding film 24, compared to a solid-state imagingdevice according to the related art. Thus, the present embodiment can beadvantageously applied to fabrication of a solid-state imaging devicehaving a global shutter function, in which leakage of light into afloating diffusion significantly affects image quality due to a longstorage period of signal charge in the floating diffusion. Further, thesolid-state imaging device 1 can suppress degradation of image qualitydue to incidence of high-luminance light into the floating diffusion 15.

In the above embodiment, the bottom wiring layer M0 disposed in a layerlower than the multi-wiring layer 29 is used as the light-shielding film24 in the pixel section 3. The bottom wiring layer M0 may be used forthe pixel section 3 as well as used for both the pixel section 3 and theperipheral circuit region 12.

When the bottom wiring layer M0 constituting the light-shielding film 24is used only for forming the pixel section 3, the peripheral circuitregion 12 having a general configuration can be used. In general, in theperipheral circuit region 12, a basic layout is prepared for each basiccomponent such as an inverter, NAND, and NOR, and these components arefabricated in the multi-wiring layer 29. Therefore, when the bottomwiring layer M0 constitutes only the pixel section 3, the peripheralcircuit region 12 can be fabricated by employing processes according tothe related art. In particular, when the bottom wiring layer M0constitutes the peripheral circuit region 12, a signal delay or the likemay occur due to an increase in parasitic capacitance associated withother wiring layers. If such a delay is concerned, the bottom wiringlayer M0 may be used only for fabricating the pixel section 3.

Moreover, a CMOS solid-state imaging device may be provided with variousanalog circuits and A/D (analog/digital) converters mounted on the samechip. Such circuits include nodes and elements such as an S/H (sampleand hold) capacitor which are electrically floating similarly to afloating diffusion. It is desirable that these nodes and elements besufficiently shielded from light. According to the solid-state imagingdevice 1 in the present embodiment, it is possible to shield the nodesand elements in the peripheral circuit region 12 from light by using thebottom wiring layer M0 as a light-shielding film constituted by thebottom wiring layer M0. Thus, the solid-state imaging device 1 can alsoimprove the light-shielding property even when the bottom wiring layerM0 is also used as a light-shielding film for the peripheral circuitregion 12.

Further, the bottom wiring layer M0 constituting the light-shieldingfilm 24 may also be used as a wire in the peripheral circuit region 12.In this case, the bottom wiring layer M0 is used as wires in individualblocks, which can increase the degree of integration of the individualblocks. Accordingly, the size of each block can be reduced, and thussize reduction of the solid-state imaging device 1 can be realized.

2. Second Embodiment Solid-State Imaging Device

In the following, a solid-state imaging device according to a secondembodiment of the present invention will be described. FIG. 10 is a planview illustrating a single pixel in the solid-state imaging device 35according to the second embodiment of the present invention. FIG. 11 isa cross sectional view taken along line XI-XI′. The overallconfiguration of the solid-state imaging device 35 in the presentembodiment is similar to that of the solid-state imaging device 1illustrated in FIG. 1, and the description thereof will be omitted. Thesolid-state imaging device 35 in the present embodiment has pixels 2configured similarly to the pixels 2 in the first embodiment illustratedin FIG. 4, and thus the description thereof will be omitted. In FIG. 10and FIG. 11, the same reference numerals are used to refer to the sameor corresponding components as those shown in FIG. 2 and FIG. 3,respectively, and the description of the components will be omitted.

The solid-state imaging device 35 according to the present embodimentincludes a light-shielding film 34 which is an example of a modificationof the light-shielding film 24 in the solid-state imaging device 1according to the first embodiment.

In the solid-state imaging device 35 in the present embodiment, asillustrated in FIG. 10, the light-shielding film 34 extends from aregion covering a floating diffusion 15 to a region around aphotodetector 14 except for a region directly above the aperture of thephotodetector 14. In the present embodiment, the portion of thelight-shielding film 34 covering the floating diffusion 15 iselectrically connected to the portion of the light-shielding film 34around the photodetector 14. However, these portions may be separatedfrom each other.

In the solid-state imaging device 35 in the present embodiment, thefloating diffusion 15 and a gate electrode 22 of an amplificationtransistor Tr3 are electrically connected to each other in the samemanner as the example shown in FIG. 5 or FIG. 6.

To fabricate the solid-state imaging device 35 according to the presentembodiment, a bottom wiring layer M0 is patterned so that thelight-shielding film 34 extends around the photodetector 14 in theprocess illustrated in FIG. 8E in the first embodiment.

In the solid-state imaging device 35, the light-shielding film 34 isformed in a layer lower than a multi-wiring layer 29, so that thelight-shielding film 34 formed around the photodetector 14 is lessdistant from the substrate 13. This arrangement prevents mixing of lightincident on neighboring pixels. For example, light which has passedthrough a red color filter of one of the pixels 2 can be prevented fromtraveling into the photodetector 14 constituting an adjacent one of thepixels 2 having a green color filter. Accordingly, mixing of colors canbe avoided, and thus the image quality can be improved.

In the present embodiment, besides the above effect, similar effects andadvantages to those in the first embodiment can be obtained.

3. Third Embodiment Solid-State Imaging Device

In the following, a solid-state imaging device according to a thirdembodiment of the present invention will be described.

FIG. 12 is a schematic cross-sectional view of a solid-state imagingdevice 45 according to the third embodiment of the present invention.The overall configuration of the solid-state imaging device 45 issimilar to that of the solid-state imaging device 1 in the firstembodiment illustrated in FIG. 1, and thus the description thereof willbe omitted. In addition, in the solid-state imaging device 45, theplanar layout and circuit configuration of a single pixel are similar tothose in the first embodiment illustrated in FIG. 2 and FIG. 4, and thedescription thereof will be omitted. In FIG. 12, the same referencenumerals are used to refer to the same or corresponding components asthose shown in FIG. 3, and the description of the components will beomitted.

[3.1 Configurations of Main Components]

In the solid-state imaging device 45 according to the presentembodiment, an impurity region 19 constituting the drain of a selectiontransistor Tr4 is connected to a vertical signal line VSL via anintermediate film 44 a constituted by a bottom wiring layer M0. That is,the vertical signal line VSL and the impurity region 19 are electricallyconnected via a first contact portion 47 formed in a first insulatinglayer 27, the intermediate film 44 a, and a second contact portion 46formed in a second insulating layer 28.

[3.2 Fabrication Method of Solid-State Imaging Device]

Referring to FIG. 13A and FIG. 14E, a method for fabricating thesolid-state imaging device 45 according to the present embodiment willbe described. FIG. 13A to FIG. 14E illustrate individual processes inthe fabrication method of the solid-state imaging device 45.

The processes to be performed prior to the process illustrated in FIG.13A are similar to the processes in the first embodiment illustrated inFIGS. 7A to 7C, and thus description thereof will be omitted.

After the first insulating layer 27 is formed as illustrated in FIG. 7C,an aperture 25 a is formed through a gate insulating film 16 and thefirst insulating layer 27 so that a floating diffusion 15 is exposed, asillustrated in FIG. 13A. At the same time, an aperture 47 a is formedthrough the gate insulating film 16 and the first insulating layer 27 sothat the impurity region 19 constituting the selection transistor Tr4 isexposed.

Then, as illustrated in FIG. 13B, the aperture 25 a formed above thefloating diffusion 15 is filled with tungsten so that a contact portion25 is formed. At the same time, the aperture 47 a formed above theimpurity region 19 is filled with tungsten so that the first contactportion 47 is formed. Then, the bottom wiring layer M0 made of tungstenis formed on the first insulating layer 27 at a region covering thefloating diffusion 15 and a region including the first contact portion47. The bottom wiring layer M0 formed at a region which covers thefloating diffusion 15 is used as a light-shielding film 44, and thebottom wiring layer M0 formed at a region including the first contactportion 47 on the first insulating layer 27 is used as the intermediatefilm 44 a. The light-shielding film 44 and the intermediate film 44 aare formed by patterning a tungsten metal film formed on the entireupper surface of the first insulating layer 27. It is desirable that theregion occupied by light-shielding film 44 on the first insulating layer27 be larger than the upper surface of the floating diffusion 15. Thisarrangement improves the light shielding effect for light incident fromvarious angles.

Subsequently, as illustrated in FIG. 13C, a second insulating layer 28is further formed on the first insulating layer 27 including thelight-shielding film 44 and the intermediate film 44 a.

Then, as illustrated in FIG. 14D, an aperture 46 a is formed in thesecond insulating layer 28 so that the intermediate film 44 a isexposed.

Further, as illustrated in FIG. 14B, the aperture 46 a is filled withtungsten so that a second contact portion 46 is formed. At the sametime, a wiring layer M1 made of aluminum or copper is formed at apredetermined position on the second insulating layer 28 including thesecond contact portion 46. In the example illustrated in FIG. 14E, thewiring layer M1, which is connected to the impurity region 19 via thefirst contact portion 47, the intermediate film 44 a, and the secondcontact portion 46, constitutes a vertical signal line VSL.

Then, an interlayer insulating film 30 and wiring layers arealternatively formed, so that a multi-wiring layer 29 having a pluralityof wiring layers (three wiring layers M1, M2, and M3 in the presentembodiment) is formed.

Subsequently, although not illustrated in the drawings, a planarizingfilm, a color filter layer, an on-chip microlens, and so forth areformed, using a general fabrication method of a solid-state imagingdevice, and thus the fabrication of the solid-state imaging device 45 iscompleted.

In the process (illustrated in FIG. 9G) according to the fabricationmethod in the first embodiment, in forming an aperture having a depthequal to the combined thicknesses of the first insulating layer 27 andthe second insulating layer 28, there is a problem in that the diameterof the aperture increases with increasing depth of the aperture.

According to a fabrication method of a solid-state imaging device in thepresent embodiment, the contact portion connecting the wiring layer M1in the multi-wiring layer 29 (vertical signal line VSL in the presentembodiment) to a desired region formed on the substrate 13 (the impurityregion 19 in the present embodiment) is formed in two steps. As aresult, each of the apertures 47 a and 46 a which is formed in a singlestep can have a reduced depth. Thus, according to the presentembodiment, it is possible to form the apertures 47 a and 46 a ininsulating layers each having a small thickness, and thus to reduce theaspect ratio of each of the apertures 47 a and 46 a. Consequently, thefirst contact portion 47 and the second contact portion 46 can be formedto be very small compared to the fabrication method according to thefirst embodiment, which permits reduction of pixel size. When thefabrication method according to the present embodiment is employedwithout attempting to reduce the pixel size, the degree of integrationof each element can be increased, which permits an increase in size ofthe aperture of the photodetector 14.

In the present embodiment, the wiring layer M1 connected to thesubstrate 13 constitutes a vertical signal line VSL. The size of eachcontact portion can be further reduced by forming a contact portion, forexample, connecting a gate electrode to a wire in the multi-wiring layerin a similar manner to the above example.

In the solid-state imaging device 45 according to the presentembodiment, similar effects to those in the first embodiment can beachieved.

The fabrication method of a solid-state imaging device according to thepresent embodiment can be applied to a solid-state imaging deviceaccording to the second embodiment.

4. Fourth Embodiment Solid-State Imaging Device

In the following, a solid-state imaging device according to the fourthembodiment of the present invention will be described. FIG. 15A is across-sectional view schematically illustrating a configuration of asolid-state imaging device 57 according to the fourth embodiment. Theoverall configuration of the solid-state imaging device 57 in thepresent embodiment is similar to that of the solid-state imaging device1 illustrated in FIG. 1, and the description thereof will be omitted. InFIG. 15A, the same reference numerals are used to refer to the same orcorresponding components as those illustrated in FIG. 3, and thedescription of the components will be omitted. The solid-state imagingdevice 57 has a global shutter function, in which all pixels aresimultaneously exposed (signal charge is simultaneously stored), andincludes two floating diffusions.

The solid-state imaging device 57 includes a photodetector 14 formed onthe upper side of a substrate 13, a first floating diffusion 15 a and asecond floating diffusion 15 b.

A gate electrode 50 constituting a first transfer transistor Tr1 a isdisposed between the photodetector 14 and the first floating diffusion15 a on a gate insulating film 16 formed on the upper surface of thesubstrate 13. A gate electrode 51 constituting a second transfertransistor Trlb is disposed between the first floating diffusion 15 aand the second floating diffusion 15 b on the gate insulating layer 16on the substrate 13.

Although not illustrated in FIG. 15A, also in the present embodiment, areset transistor, an amplification transistor, a selection transistor,and the like are provided, as in the cases of the first to thirdembodiments.

A first insulating layer 27 is formed on the gate insulating film 16including the gate electrodes 50 and 51. A light-shielding film 54constituted by a bottom wiring layer M0 is formed on the firstinsulating layer 27 at a region including a region directly above thefirst floating diffusion 15 a. Similarly, light-shielding film 55constituted by the bottom wiring layer M0 is formed on the firstinsulating layer 27 at a region including a region directly above thesecond floating diffusion 15 b. The light-shielding film 54 iselectrically connected to the first floating diffusion 15 a via acontact portion 52 formed in the first insulating layer 27. Thelight-shielding film 55 is electrically connected to the second floatingdiffusion 15 b via a contact portion 53 formed in the first insulatinglayer 27. In the present embodiment, the light-shielding films 54 and 55and the contact portions 52 and 53 are made of tungsten.

A second insulating layer 28 is formed on the first insulating layer 27including the light-shielding films 54 and 55. Further, a multi-wiringlayer 29 containing a plurality of wiring layers (three wiring layersM1, M2, and M3 in the present embodiment) is formed on the secondinsulating layer 28. The wiring layer M1 located at the lowest positionamong the wiring layers in the multi-wiring layer 29 is electricallyconnected to the light-shielding film 55 by a contact portion 56 formedin the second insulating layer 28. Although not shown in the figure, thewiring layer M1 electrically connected to the second floating diffusion15 b is connected to the gate electrode of the amplification transistor.

In the solid-state imaging device 57 having the above configuration,signal charge generated in the photodetector 14 of every one of pixels 2by simultaneous exposure is transferred by the first transfer transistorTr1 a to the first floating diffusion 15 a at the same time. Then, afterbeing held in the first floating diffusion 15 a for a predeterminedperiod of time, the signal charge is transferred by the second transfertransistor Tr1 b pixel by pixel to the second floating diffusion 15 b. Avoltage variation caused by the signal charge transferred to the secondfloating diffusion 15 b is amplified by the amplification transistor(not shown), and an amplified pixel signal is output to a verticalsignal line.

In the solid-state imaging device 57 in the present embodiment, thefirst floating diffusion 15 a, which holds signal charge for a longtime, is shielded from light by the light-shielding film 54 constitutedby the bottom wiring layer M0 disposed close to the light receivingsurface of the substrate 13. This arrangement can prevent leakage ofincident light into the floating diffusion 15 a even while signal chargeis held in the first floating diffusion 15 a, which can suppress noiseand degradation of image quality.

In addition, the light-shielding film 54 disposed above the firstfloating diffusion 15 a is electrically connected to the first floatingdiffusion 15 a. Therefore, by increasing the size of the light-shieldingfilm 54, saturation charge in the first floating diffusion 15 a can beincreased using parasitic capacitance of the light-shielding film 54.

On the other hand, in the solid-state imaging device 57 according to thepresent embodiment, the light-shielding film 55 disposed above thesecond floating diffusion 15 b is connected to the wiring layer M1 inthe multi-wiring layer 29. Thus, it is desired that parasiticcapacitance between the light-shielding film 55 and the wiring layer M1be small. Therefore, it is desired that the light-shielding film 55 hasa size that is only sufficient to shield the second floating diffusion15 b from light.

Meanwhile, in the present embodiment, it is not necessary to connect thelight-shielding film 54 disposed above the first floating diffusion 15 ato the first floating diffusion 15 a. In this case, as illustrated inFIG. 15B, a light-shielding film 58 for shielding both the firstfloating diffusion 15 a and the second floating diffusion 15 b is formedof the bottom wiring layer M0 above the floating diffusions 15 a and 15b. Thus, when two floating diffusions are provided, contact portions areformed at only a location to be connected to a gate electrode of theamplification transistor.

In this way, according to the present embodiment, light leakage into afloating diffusion can be prevented even in a solid-state imaging devicehaving a global shutter function, in which the floating diffusion holdssignal charge for a long period of time.

Also in the present embodiment, similar effect to those in the firstembodiment can be achieved. In addition, the configuration in thepresent embodiment may be combined with those in the second and thirdembodiments.

In the foregoing, CMOS solid-state imaging devices including pixel unitsarranged in matrix for detecting signal charge corresponding to thequantity of incident light as a physical quantity are described asexamples of the first to fourth embodiments. However, application of thepresent invention is neither limited to CMOS solid-state imaging devicesnor to solid-state imaging devices in general including column circuitsfor individual pixel columns in a pixel section formed intwo-dimensional matrix.

Further, application of the present invention is not limited to asolid-state imaging device configured to capture an image by detecting adistribution of the quantity of incident visible light. The presentinvention may also be applied to solid-state imaging device configuredto detect a distribution of the quantity of infrared radiation, X-rays,or particles. In a broader sense, the present invention may also beapplied to solid-state imaging devices (physical quantity distributiondetectors) in general, such as fingerprint sensors, which are configuredto detect distributions of physical quantities such as pressure andcapacitance so as to capture images.

Moreover, the application of the present invention is not limited to asolid-state imaging device configured to sequentially scan pixel unitsin pixel sections in units of rows so as to read pixel signals from thepixel units. The present invention may also be applied to an X-Y addresssolid-state imaging device configured to select arbitrary pixels andread signals from the selected pixels on a pixel-by-pixel basis.

A solid-state imaging device according to an embodiment of the presentinvention may be formed as one chip or in a form of a module having animage capturing function in which a signal processing unit and anoptical system are packaged.

Furthermore, application of the present invention is not limited to asolid-state imaging device, and the present invention may be applied toimaging apparatuses. Such imaging apparatus include camera systems suchas digital still cameras and electronic apparatuses having imagingfunctions such as mobile phones. Modules mounted in the electronicapparatuses, i.e., camera modules, may also serve as imagingapparatuses.

5. Fifth Embodiment Electronic Apparatus

In the following, an electronic apparatus according to the fifthembodiment of the present invention will be described. FIG. 16schematically illustrates a configuration of an electronic apparatus 200according to the fifth embodiment of the present invention.

The electronic apparatus 200 is an example of an electronic apparatus(camera) to which the solid-state imaging device 1 according to thefirst embodiment described above is applied.

FIG. 16 schematically illustrates a cross-sectional configuration of theelectronic apparatus 200 according to the present embodiment. Theelectronic apparatus 200 may be a digital camera capable of capturing astill image.

The electronic apparatus 200 includes the solid-state imaging device 1,an optical lens 210, a shutter 211, a drive circuit 212, and a signalprocessing circuit 213.

The optical lens 210 forms an image corresponding to incident light froman imaging object on an imaging plane of the solid-state imaging device1. As a result, signal charge is stored in the solid-state imagingdevice 1 for a predetermined period of time.

The shutter 211 controls an exposure time and a light-shielding time ofthe solid-state imaging device 1.

The drive circuit 212 supplies a drive signal for controlling transferoperations of the solid-state imaging device 1 and shutter operations ofthe shutter 211. The solid-state imaging device 1 transfers signals inaccordance with drive signals (timing signals) supplied from the drivecircuit 212. The signal processing circuit 213 performs various signalprocessing. A processed image signal is stored in a storage medium suchas a memory or output to a monitor.

In the electronic apparatus 200 in the present embodiment, floatingdiffusions of the solid-state imaging device 1 are advantageouslyshielded from light by light-shielding films constituted by bottomwiring layers, so that leakage of light into the floating diffusions aresuppressed. Thus, the electronic apparatus 200 can suppress degradationof image quality due to noise.

The electronic apparatus 200 to which the solid-state imaging device 1can be applied is not limited to a camera. The electronic apparatus 200may also be an imaging apparatus such as a digital still camera and acamera module for a mobile device such as a mobile phone.

While in the present embodiment, the solid-state imaging device 1 isapplied to the electronic apparatus 200, the solid-state imaging devicesaccording to the second to fourth embodiments described above may alsobe applied to the electronic apparatus 200.

The present application contains subject matter related to thatdisclosed in Japanese Priority Patent Application JP 2009-052324 filedin the Japan Patent Office on Mar. 5, 2009, the entire content of whichis hereby incorporated by reference.

It should be understood by those skilled in the art that variousmodifications, combinations, sub-combinations and alterations may occurdepending on design requirements and other factors insofar as they arewithin the scope of the appended claims or the equivalents thereof.

1. A solid-state imaging device comprising: a photodetector formed on a substrate, the photodetector being configured to generate signal charge by converting incident light into electricity; a floating diffusion configured to receive the signal charge generated by the photodetector; a plurality of MOS (metal oxide semiconductor) transistors including a transfer transistor that transfers the signal charge to the floating diffusion and an amplification transistor that outputs an pixel signal corresponding to a potential of the floating diffusion; a multi-wiring layer formed in a layer higher than the substrate, the multi-wiring layer being composed of a plurality of wiring layers electrically connected to the MOS transistors via contact portions; and a light-shielding film constituted by a bottom wiring layer disposed in a layer higher than the substrate and lower than the multi-wiring layer, the light-shielding film being formed at a region that shields at least the floating diffusion from the light, the light-shielding film being electrically connected to the floating diffusion via a contact portion.
 2. The solid-state imaging device of claim 1, wherein the light-shielding film is electrically connected to a gate electrode of the amplification transistor via a contact portion.
 3. The solid-state imaging device of claim 2, wherein the light-shielding film is formed so as to surround the photodetector except in a region directly above an aperture of the photodetector.
 4. The solid-state imaging device of claim 1, wherein the MOS transistors are electrically connected to the wiring layers in the multi-wiring layer by contact portions via an intermediate film constituted by the bottom wiring layer.
 5. A method for fabricating a solid-state imaging device, the method comprising the steps of: forming a photodetector and a floating diffusion on a substrate; forming a first insulating layer on the substrate; forming an aperture in the first insulating layer so that the floating diffusion is exposed; forming a contact portion by filling the aperture with a metallic material; forming a light-shielding film constituted by a bottom wiring layer at a region on the first insulating layer including the contact portion, the region shielding the floating diffusion from light; forming a second insulating layer on the first insulating layer including the light-shielding film; and forming a multi-wiring layer having a plurality of wiring layers on the second insulating layer.
 6. The method of claim 5, further comprising the step of forming the light-shielding film so as to surround the photodetector except in a region directly above the aperture of the photodetector.
 7. A method for fabricating a solid-state imaging device, the method comprising the steps of: forming a photodetector, a floating diffusion, and an impurity region on a substrate, the impurity region constituting a predetermined source or drain of a MOS transistor; forming apertures for exposing the floating diffusion and the impurity region by removing respective portions of the first insulating layer above the floating diffusion and the impurity region; forming contact portions by filling the apertures formed in the first insulating layer with a metallic material; forming a light-shielding layer constituted by a bottom wiring layer at a region on the first insulating layer including the contact portion formed on the floating diffusion, the region shielding the floating diffusion from the light, and forming an intermediate film constituted by the bottom wiring layer on the first insulating layer including the contact portion formed on the impurity region; forming a second insulating layer on the first insulating layer including the light-shielding film and the intermediate film; forming an aperture in the second insulating layer so that the intermediate film is exposed; forming a contact portion by filling the aperture formed in the second insulating layer with a metallic material; and forming a multi-wiring layer having a plurality of wiring layers including a wire connected to the contact portion formed in the second insulating layer.
 8. The method of claim 7, further comprising the step of forming the light-shielding film so as to surround the photodetector except in a region directly above the aperture of the photodiode.
 9. An electronic apparatus comprising: an optical lens; a solid-state imaging device configured to receive light collected by the optical lens, the solid-state imaging device including a photodetector formed on a substrate, the photodetector being configured to generate signal charge by converting incident light into electricity, a floating diffusion configured to receive the signal charge generated by the photodetector, a plurality of MOS (metal oxide semiconductor) transistors including a transfer transistor that transfers the signal charge to the floating diffusion and an amplification transistor that outputs an pixel signal corresponding to a potential of the floating diffusion, a multi-wiring layer formed in a layer higher than the substrate, the multi-wiring layer being composed of a plurality of wiring layers electrically connected to the MOS transistors via contact portions, and a light-shielding film constituted by a bottom wiring layer disposed in a layer higher than the substrate and lower than the multi-wiring layer, the light-shielding film being formed at a region that shields at least the floating diffusion from the light, the light-shielding film being electrically connected to the floating diffusion via a contact portion; and a signal processing circuit configured to process a signal output from the solid-state imaging device. 